An analog-to-digital converter (ADC) may be defined by its bandwidth and by its resolution or signal-to-noise ratio (SNR). Traditional ADC designs are voltage-mode based, digitizing an input signal in the voltage domain. The bandwidth of an ADC may be improved by reducing input capacitance, as direct charging to within half of a least significant bit (LSB) may be difficult at higher input capacitances. Similarly, the accuracy and speed of an ADC may be adversely affected by repeated charges to a higher capacitance, as additional time may be required for the charge to release or settle. However, while reduced input capacitance may allow for increased bandwidth in a voltage-mode ADC, reducing input capacitance may still constrain performance by leading to a reduction in SNR. Some photonic ADC (pADC) systems may convert a modulated optical pulse (e.g., a stream of photons) into a current signal, but this current-mode output must still be converted to a voltage-domain ADC input subject to the same constraints.